ADLINK Technology cPCI-9116 Guide de l'utilisateur télécharger pdf (Page 36)

26 • Registers

DMA (Bit8): Write Only, set for DMA transfer

SC_dis (Bit7): Write Only, set to disable the SC counter

Clear Channel Gain Queue (Bit6): Write Only

Clear the Channel Gain Queue

0: no effect on the Channel Gain Queue

1: clear the Channel Gain Queue

Set done (Bit5): Write Only

0: indicate the Channel Gain Queue is not ready

1: indicate the Channel Gain Queue is OK

Clear DFIFO(Bit4) : Write Only

Clear the Data FIFO:

0: no effect on Data FIFO

1: clear the Data FIFO

Clear Trg_det(Bit3) : Write 1 to clear

Write 1 to clear the trigger status:

0: no effect

1: clear trigger detect status

Clear SC_TC(Bit2) : Write 1 to clear

Write 1 to clear Scan Counter Terminal Count status

0: no effect

1: clear the SC_TC status

Clear ADOR(Bit1) : Write 1 to clear

Write 1 to clear the A/D Overrun Status

0: no effect

1: clear the A/D Overrun status

Clear ADOS(Bit0) : Write 1 to clear

Write 1 to clear the A/D Over Speed Status:

0: no effect

1: clear the A/D Over-Speed status

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ADLINK Technology cPCI-9116 Guide de l'utilisateur Page 36