ADLINK Technology PCI-7200 Spécifications Page 18
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- Table des matières
- MARQUE LIVRES
- PCI-7200 / cPCI-7200 1
- CONTENTS 5
- Contents •• iii 7
- How to Use This Guide 9
- Introduction 11
- 1.1 Applications 12
- 1.2 Features 12
- 1.3 Specifications 13
- 4 •• Introduction 14
- Installation 15
- 2.2 Unpacking 16
- Installation •• 7 17
- 2.4 PCI-7200’s Layout 18
- Installation •• 9 19
- 10 •• Installation 20
- 2.6 Connector Pin Assignment 21
- 12 •• Installation 22
- 8254 Timer/Counter 23
- 4MHz Clock 23
- 14 •• Installation 24
- 3.1 I/O Registers Format 25
- Base +18 27
- Base +19 27
- Base +20 27
- Base +21 27
- Base +1C 29
- Base +1D 29
- Base +1E 29
- Base +1F 29
- Operation Theorem 33
- 4.2 Timer Pacer Mode 34
- Latch Digital Input 35
- Digital Input FIFO 35
- PC's Main Memory 35
- 26 •• Operation Theorem 36
- Operation Theorem •• 27 37
- 28 •• Operation Theorem 38
- Operation Theorem •• 29 39
- 30 •• Operation Theorem 40
- Operation Theorem •• 31 41
- C/C++ & DLL Libraries 43
- Ÿ Windows 95/98 46
- 5.4 _7200_Initial 46
- 5.5 _7200_Switch_Card_No 48
- 5.6 _7200_AUX_DI 49
- 5.7 _7200_AUX_DI_Channel 50
- 5.8 _7200_AUX_DO 51
- 5.9 _7200_AUX_DO_Channel 52
- 5.10 _7200_DI 53
- 5.11 _7200_DI_Channel 54
- 5.12 _7200_DO 55
- 5.13 _7200_DO_Channel 56
- 5.14 _7200_Alloc_DMA_Mem 57
- 5.15 _7200_Free_DMA_Mem 59
- 5.16 _7200_Alloc_DBDMA_Mem 60
- 5.17 _7200_Free_DBDMA_Mem 61
- 5.18 _7200_DI_DMA_Start 62
- 5.19 _7200_DI_DMA_Status 66
- 5.20 _7200_DI_DMA_Stop 67
- 5.21 _7200_DblBufferMode 68
- 5.22 _7200_CheckHalfReady 69
- 5.23 _7200_DblBufferTransfer 70
- 5.24 _7200_GetOverrunStatus 71
- 5.25 _7200_DO_DMA_Start 72
- 5.26 _7200_DO_DMA_Status 74
- 5.27 _7200_DO_DMA_Stop 75
- Counter 0 76
- Digital Input Trigger 76
- 4MHz Input 78
- Double Buffer Mode Principle 81
- > > > 82
- > > 82
- Limitation 83
- Appendix A. 8254 85
- Programmable Interval Timer 85
- A.2 The Control Byte 86
- A.3 Mode Definition 87
- Product Warranty/Service 91
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